Dongsuk Shin

A 7 ps Jitter 0.053 mm<formula formulatype="inline"> <tex Notation="TeX">$^{2}$</tex></formula> Fast Lock All-Digital DLL With a Wide Range and High Resolution DCC

Dongsuk Shin, Janghoon Song, Hyunsoo Chae et al. · IEEE Journal of Solid-State Circuits · 2009 · 66 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 0.1-to-1.5GHz 4.2mW All-Digital DLL with Dual Duty-Cycle Correction Circuit and Update Gear Circuit for DRAM in 66nm CMOS Technology

Won-Joo Yun, Hyun‐Woo Lee, Dongsuk Shin et al. · 2008 · 33 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 3.57 Gb/s/pin Low Jitter All-Digital DLL With Dual DCC Circuit for GDDR3 DRAM in 54-nm CMOS Technology

Won-Joo Yun, Hyun-Woo Lee, Dongsuk Shin et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2010 · 33 citations

Engineering, Computer Engineering, Electrical Engineering +16

Wide-range fast-lock duty-cycle corrector with offset-tolerant duty-cycle detection scheme for 54nm 7Gb/s GDDR5 DRAM interface

Dongsuk Shin, Kwang-Jin Na, Daehan Kwon et al. · 2009 · 21 citations

Engineering, Computer Engineering, Electrical Engineering +16

An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory

Dongsuk Shin, Hakbeom Jang, Kiseok Oh et al. · ACM Transactions on Embedded Computing Systems · 2022 · 20 citations

Engineering, Computer Engineering, Computer Science +17