K. Imamiya

A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure

Akira Umezawa, S. Atsumi, M. Kuriyama et al. · IEEE Journal of Solid-State Circuits · 1992 · 148 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 70 nm 16 Gb 16-Level-Cell NAND flash Memory

Noboru Shibata, K. Isobe, K. Iwasa et al. · IEEE Journal of Solid-State Circuits · 2008 · 81 citations

Engineering, Computer Engineering, Computer Science +13

A negative V/sub th/ cell architecture for highly scalable, excellently noise-immune, and highly reliable NAND flash memories

Ken Takeuchi, S. Satoh, Tomoharu Tanaka et al. · IEEE Journal of Solid-State Circuits · 1999 · 34 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 130-mm/sup 2/, 256-Mbit NAND flash with shallow trench isolation technology

K. Imamiya, Y. Sugiura, Hiroshi Nakamura et al. · IEEE Journal of Solid-State Circuits · 1999 · 31 citations

Engineering, Computer Engineering, Electrical Engineering +15

A source-line programming scheme for low-voltage operation NAND flash memories

Ken Takeuchi, S. Satoh, K. Imamiya et al. · IEEE Journal of Solid-State Circuits · 2000 · 29 citations

Engineering, Computer Engineering, Computer Science +13