Jonathan Chang

The 65-nm 16-MB Shared On-Die L3 Cache for the Dual-Core Intel Xeon Processor 7100 Series

Jonathan Chang, Ming Huang, Jonathan Shoemaker et al. · IEEE Journal of Solid-State Circuits · 2007 · 80 citations

Engineering, Memory Design, Emerging Memory Technology +19

A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor

Cheolmin Park, R.W. Badeau, Larry Biro et al. · 2010 · 20 citations

System On Chip, Electrical Engineering, Nm Technology +12

A 45nm 8-core enterprise Xeon<sup>®</sup> processor

Stefan Rusu, Simon Tam, H. Muljono et al. · 2009 · 20 citations

Engineering, Energy Efficiency, Computer Architecture +16

Power reduction techniques for an 8-core xeon<sup>®</sup> processor

Stefan Rusu, Simon Tam, H. Muljono et al. · 2009 · 14 citations

Engineering, Energy Efficiency, Computer Architecture +19

A 45nm 24MB on-die L3 cache for the 8-core multi-threaded Xeon ® Processor

Jonathan Chang, Szu-Liang Chen, Wei Chen et al. · 2009 · 11 citations

Engineering, Vlsi Design, Computer Architecture +16