Jaewook Shin

A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET

Yohan Frans, Jaewook Shin, Lei Zhou et al. · IEEE Journal of Solid-State Circuits · 2017 · 162 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 1.9–3.8 GHz $\Delta \Sigma$ Fractional-N PLL Frequency Synthesizer With Fast Auto-Calibration of Loop Bandwidth and VCO Frequency

Jaewook Shin, Hyunchol Shin · IEEE Journal of Solid-State Circuits · 2012 · 94 citations

Engineering, Electrical Engineering, Analog Electronics +13

A Wide-Band CMOS <i>LC</i> VCO With Linearized Coarse Tuning Characteristics

Jongsik Kim, Jaewook Shin, Seungsoo Kim et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2008 · 89 citations

Engineering, Electrical Engineering, Analog Electronics +15

A 4-to-16GHz inverter-based injection-locked quadrature clock generator with phase interpolators for multi-standard I/Os in 7nm FinFET

Stanley Chen, Lei Zhou, Zhuang Ian et al. · 2018 · 67 citations

Engineering, Computer Engineering, Electrical Engineering +16

14.9 Sub-sampling all-digital fractional-N frequency synthesizer with &amp;#x2212;111dBc/Hz in-band phase noise and an FOM of &amp;#x2212;242dB

Zuow-Zun Chen, Yen‐Hsiang Wang, Jaewook Shin et al. · 2015 · 47 citations

Engineering, Electrical Engineering, Analog Electronics +14