Fady Abouzeid

A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking

Édith Beigné, Alexandre Valentian, Ivan Miro-Panades et al. · IEEE Journal of Solid-State Circuits · 2014 · 45 citations

Low-power Electronics, Electrical Engineering, Engineering +11

8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing

Sylvain Clerc, Mehdi Saligane, Fady Abouzeid et al. · 2015 · 43 citations

Engineering, Vlsi Design, Body Bias +19

A 225 μm ${}^{2}$ Probe Single-Point Calibration Digital Temperature Sensor Using Body-Bias Adjustment in 28 nm FD-SOI CMOS

Martin Cochet, Ben Keller, Sylvain Clerc et al. · IEEE Solid-State Circuits Letters · 2018 · 42 citations

Engineering, Measurement, Education +21

A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding F_MAX tracking

Robin Wilson, Édith Beigné, Philippe Flatresse et al. · 2014 · 39 citations

Low-power Electronics, Electrical Engineering, Signal Processing Complexity +14

A 2.7 pJ/cycle 16 MHz, 0.7 <inline-formula> <tex-math notation="LaTeX">$\mu\text{W}$ </tex-math> </inline-formula> Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

Guénolé Lallement, Fady Abouzeid, Martin Cochet et al. · IEEE Journal of Solid-State Circuits · 2018 · 31 citations

Engineering, Vlsi Design, Computer Architecture +23