An accurate worst case timing analysis for RISC processors

Sung-Soo Lim, Young Hyun Bae, Gyu Tae Jang, +7

IEEE Transactions on Software Engineering

EngineeringTiming SchemaComputer ArchitectureSoftware EngineeringComputational Complexity +21

An accurate worst case timing analysis technique for RISC processors

Sung-Soo Lim, Young Hyun Bae, Gyu Tae Jang, +6

EngineeringTiming SchemaComputer ArchitectureSoftware EngineeringComputational Complexity +22

A worst case timing analysis technique for multiple-issue machines

Sung-Soo Lim, Jung Hee Han, Jihong Kim, +1

EngineeringWorst CaseComputer ArchitectureSoftware EngineeringComputational Complexity +21

Worst case timing analysis of RISC processors: R3000/R3010 case study

Y. Hur, Young Hyun Bae, Sung-Soo Lim, +7

EngineeringTiming SchemaComputer ArchitectureSoftware EngineeringProcessor Architecture +19

Expression, purification and characterization of a functional carbohydrate-binding module from Streptomyces sp. SirexAA-E

Sung-Soo Lim, Shishir P. S. Chundawat, Brian G. Fox

Protein Expression and Purification

BiosynthesisFunctional Carbohydrate-binding ModuleEngineeringBiochemistryBiotransformation +8

SPMVisor

Luis Angel D. Bathen, Nikil Dutt, Dongyoun Shin, +1

Hardware SecurityEngineeringDistributed SpmsMulticore PlatformsCloud Computing +12

Exploring computation offloading in IoT systems

Sina Shahhosseini, Arman Anzanpour, Iman Azimi, +6

Information Systems

EngineeringIot CommunicationComputer ArchitectureEmbedded SystemsIot Systems +16

Quality-aware mobile graphics workload characterization for energy-efficient DVFS design

Jurn-Gyu Park, Chen-Ying Hsieh, Nikil Dutt, +1

Power-aware ComputingMobile GpusMobile GraphicsEngineeringPower-aware Software +12

ML-Gov

Jurn-Gyu Park, Nikil Dutt, Sung-Soo Lim

EngineeringMachine LearningData ScienceEnergy EfficiencyEdge Computing +13

Co-Cap

Jurn-Gyu Park, Chen-Ying Hsieh, Nikil Dutt, +1

Heterogeneous ComputingEngineeringEnergy EfficiencyComputer ArchitectureMobile Games +14