Ming-Che Hsieh

Solder joint fatigue life prediction in large size and low cost wafer-level chip scale packages

Ming-Che Hsieh, Su-Lan Tzeng · 2014 · 44 citations

Engineering, Electrical Engineering, Materials Engineering +16

Modeling correlation for solder joint fatigue life estimation in wafer-level chip scale packages

Ming-Che Hsieh · 2015 · 38 citations

Engineering, Materials Engineering, Materials Science +17

Strength evaluation of silicon die for 3D chip stacking packages using ABF as dielectric and barrier layer in through-silicon via

Chei-Wei Wu, Ming-Che Hsieh, Kuo‐Ning Chiang · Microelectronic Engineering · 2009 · 35 citations

Engineering, Electrical Engineering, Materials Engineering +17

Thermo-mechanical simulations for 4-layer stacked IC packages

Ming-Che Hsieh, Chih-Kuang Yu · 2008 · 33 citations

Engineering, Electrical Engineering, Materials Engineering +17

Unstable Morse code recognition with adaptive variable-ratio threshold prediction for physically disabled persons

Ming-Che Hsieh, Ching‐Hsing Luo, Chi‐Wu Mao · IEEE Transactions on Rehabilitation Engineering · 2000 · 31 citations

Computing, Computer Science, Assistive Technology +14