A million spiking-neuron integrated circuit with a scalable communication network and interface

Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, +17

Science

Scalable Communication NetworkEngineeringComputational NeuroscienceContemporary Silicon TechnologyNeurocomputers +13

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip

Filipp Akopyan, Jun Sawada, Andrew S. Cassidy, +15

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

EngineeringComputer ArchitectureNeurochipSocial SciencesMw 1 +15

Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores

Andrew S. Cassidy, Paul Merolla, John V. Arthur, +13

EngineeringNeurochipSocial SciencesUnconventional ComputingNeuromorphic Engineering +15

T-cell triggering thresholds are modulated by the number of antigen within individual T-cell receptor clusters

Boryana N. Manz, Bryan L. Jackson, Rebecca S. Petit, +1

Proceedings of the National Academy of Sciences

Adaptive Immune SystemT-regulatory CellImmunologyAntigen ProcessingPmhc Ligands +15

Nanoscale electronic synapses using phase change devices

Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, +12

ACM Journal on Emerging Technologies in Computing Systems

EngineeringCircuit NeuroscienceNanocomputingNanoscale Electronic SynapsesDevice Conductance +24

Highly-scalable novel access device based on Mixed Ionic Electronic conduction (MIEC) materials for high density phase change memory (PCM) arrays

Rohit S. Shenoy, C. T. Rettner, Kumar Virwani, +13

Materials ScienceElectrical EngineeringElectronic DevicesEngineeringElectronic Materials +10

Anton 3

David E. Shaw, P. J. Adams, Asaph Azaria, +64

EngineeringSupercomputer ArchitectureAnton 2Drug DiscoveryMolecular Biology +12

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100,000× Reduction in Energy-to-Solution

Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, +35

EngineeringComputer ArchitectureNeurochipSocial SciencesTrue North Chips +14

Large-scale (512kbit) integration of multilayer-ready access-devices based on mixed-ionic-electronic-conduction (MIEC) at 100% yield

Geoffrey W. Burr, Kumar Virwani, Rohit S. Shenoy, +16

Non-volatile MemoryEngineeringDevice IntegrationEmerging Memory TechnologyIntegrated Circuits +18

Observation and modeling of polycrystalline grain formation in Ge2Sb2Te5

Geoffrey W. Burr, Pierre Tchoulfian, Teya Topuria, +7

Journal of Applied Physics

EngineeringCrystal Growth TechnologyEmerging Memory TechnologyMedian Grain SizePhase Change Memory +17