Science · 2014 · 4.1K citations · 20 references
EngineeringComputer EngineeringElectrical EngineeringNeural CircuitryNeural EngineeringSystem-on-chip DesignCortical ComputationNetwork-on-chip DesignNeural CircuitsNeural IntegrationNeural InterfacesSpiking Neural NetworksInterprocess Communication InterfaceNeural Circuit ArchitectureNeuromorphic DevicesNeuromorphic HardwareReal-time ProcessingSiliconSpiking Network ArchitecturesSpiking Neuron Models
The authors develop a scalable, flexible non‑von Neumann architecture inspired by brain structure using modern silicon technology. They built a 5.4‑billion‑transistor chip with 4,096 neurosynaptic cores, 1 million programmable spiking neurons, and 256 million configurable synapses, interconnected by an intrachip network and scalable via a two‑dimensional interchip interface. The chip performs real‑time complex neural network tasks such as multi‑object detection and classification, consuming only 63 mW for 400×240 video at 30 fps.
Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non-von Neumann architecture that leverages contemporary silicon technology. To demonstrate, we built a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses. Chips can be tiled in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well suited to many applications that use complex neural networks in real time, for example, multiobject detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 63 milliwatts.
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William J. Dally, Brian Towles · 2001 · 3.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
Can programming be liberated from the von Neumann style?
John Backus · Communications of the ACM · 1978 · 2.6K citations · Full text