F. Murabayashi

A BiCMOS logic gate with positive feedback

Yoshifumi Nishio, F. Murabayashi, S. Kotoku et al. · 2003 · 35 citations

Low-power Electronics, Electrical Engineering, Bicmos Process Technology +15

2.5 V CMOS circuit techniques for a 200 MHz superscalar RISC processor

F. Murabayashi, T. Yamauchi, Hirotaka Yamada et al. · IEEE Journal of Solid-State Circuits · 1996 · 18 citations

Low-power Electronics, Ntp Circuit, Electrical Engineering +11

A 13.3ns double-precision floating-point ALU and multiplier

Hirotaka Yamada, Takashi Hotta, T Nishiyama et al. · 2002 · 17 citations

Floating-point Multiplier, Alignment Shift, Real Data Type +15

2.5V Novel CMOS Circuit Techniques for a 150MHz Superscalar RISC Processor

F. Murabayashi, Hirotaka Yamada, T. Yamauchi et al. · 1995 · 13 citations

Low-power Electronics, Noise Tolerant Precharge, Electrical Engineering +11

A feedback-type BiCMOS logic gate

Yoshifumi Nishio, F. Murabayashi, S. Kotoku et al. · IEEE Journal of Solid-State Circuits · 1989 · 10 citations

Low-power Electronics, Propagation Delay Time, Electrical Engineering +8