Tetsuya Asai

A 300 nW, 15 ppm/$^{\circ}$C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai et al. · IEEE Journal of Solid-State Circuits · 2009 · 365 citations · Full text

Low-power Electronics, Electrical Engineering, Mosfet Circuits +11

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W

Kota Ando, Kodai Ueyoshi, Kentaro Orimo et al. · IEEE Journal of Solid-State Circuits · 2017 · 154 citations

Electrical Engineering, Binary/ternaty Neural Network, Engineering +15

A molecular neuromorphic network device consisting of single-walled carbon nanotubes complexed with polyoxometalate

Hirofumi Tanaka, Megumi Akai‐Kasaya, Amin TermehYousefi et al. · Nature Communications · 2018 · 142 citations · Full text

A majority-logic device using an irreversible single-electron box

Takahide Oya, Tetsuya Asai, Takashi Fukui et al. · IEEE Transactions on Nanotechnology · 2003 · 119 citations

Hardware Security, Electrical Engineering, Engineering +14

An analog cmos central pattern generator for interlimb coordination in quadruped locomotion

Kazuki Nakada, Tetsuya Asai, Yoshiyuki Amemiya · IEEE Transactions on Neural Networks · 2003 · 99 citations

Engineering, Biorobotics, Motor Control +19