Vikram Suresh

340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS

Sanu Mathew, Sudhir Satpathy, Vikram Suresh et al. · IEEE Journal of Solid-State Circuits · 2015 · 139 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

Sudhir Satpathy, Sanu Mathew, Vikram Suresh et al. · IEEE Journal of Solid-State Circuits · 2017 · 114 citations

Engineering, Computer Engineering, Electrical Engineering +15

An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS

Sudhir Satpathy, Sanu Mathew, Raghavan Kumar et al. · IEEE Journal of Solid-State Circuits · 2019 · 104 citations

Engineering, Computer Engineering, Electrical Engineering +17

<inline-formula> <tex-math notation="LaTeX">$\mu $ </tex-math> </inline-formula>RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS

Sanu Mathew, D. J. Johnston, Sudhir Satpathy et al. · IEEE Journal of Solid-State Circuits · 2016 · 96 citations

Engineering, Computer Engineering, Electrical Engineering +17

Entropy and Energy Bounds for Metastability Based TRNG with Lightweight Post-Processing

Vikram Suresh, Wayne Burleson · IEEE Transactions on Circuits and Systems I Regular Papers · 2015 · 49 citations

Engineering, Computer Engineering, Electrical Engineering +17