N. Tamba

High-speed BiCMOS technology with a buried twin well structure

Takahide Ikeda, Atsuo Watanabe, Yoshifumi Nishio et al. · IEEE Transactions on Electron Devices · 1987 · 51 citations

Low-power Electronics, Buried Twin, Electrical Engineering +12

High speed BiCMOS VLSI technology with buried twin well structure

Atsuo Watanabe, Takahide Ikeda, T. Nagano et al. · 1985 · 25 citations

Electrical Engineering, Engineering, Vlsi Design +11

A 450 MHz 64 b RISC processor using multiple threshold voltage CMOS

Takashi Yamashita, N. Yoshida, M. Sakamoto et al. · 2002 · 21 citations

Low-power Electronics, Electrical Engineering, Physical Design (Electronics) +13

A 1.5ns, 64kb ECL-CMOS SRAM

H. Nambu, K. Kanetani, Y. Idei et al. · 1991 · 20 citations

Hardware Security, Electrical Engineering, Several High-density 1Mb +10

A 1.5-ns access time, 78- mu m/sup 2/ memory-cell size, 64-kb ECL-CMOS SRAM

Kizashi Yamaguchi, H. Nambu, K. Kanetani et al. · IEEE Journal of Solid-State Circuits · 1992 · 17 citations

Engineering, Vlsi Design, Memory Design +17