K. Kanetani

A 1.8-ns access, 550-MHz, 4.5-Mb CMOS SRAM

H. Nambu, K. Kanetani, K. Yamasaki et al. · IEEE Journal of Solid-State Circuits · 1998 · 65 citations

Hardware Security, Engineering, Vlsi Design +9

A 1.5ns, 64kb ECL-CMOS SRAM

H. Nambu, K. Kanetani, Y. Idei et al. · 1991 · 20 citations

Hardware Security, Electrical Engineering, Several High-density 1Mb +10

A 1.8 ns access, 550 MHz 4.5 Mb CMOS SRAM

H. Nambu, K. Kanetani, K. Yamasaki et al. · 2002 · 20 citations

Low-power Electronics, Hardware Security, Bicmos Sram +11

A 1.5-ns access time, 78- mu m/sup 2/ memory-cell size, 64-kb ECL-CMOS SRAM

Kizashi Yamaguchi, H. Nambu, K. Kanetani et al. · IEEE Journal of Solid-State Circuits · 1992 · 17 citations

Engineering, Vlsi Design, Memory Design +17

High-speed sensing techniques for ultrahigh-speed SRAMs

H. Nambu, K. Kanetani, Y. Idei et al. · IEEE Journal of Solid-State Circuits · 1992 · 16 citations

Engineering, Memory Design, Emerging Memory Technology +20