Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application

Chunyu Peng, J. Huang, Changyong Liu, +6

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Hspice Simulation ResultsWrite SpeedEngineeringVlsi DesignComputer Architecture +14

Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports

Zhiting Lin, Zhiyong Zhu, Honglan Zhan, +5

IEEE Journal of Solid-State Circuits

Hardware SecurityNon-volatile MemoryElectrical EngineeringMatrix TranspositionEngineering +11

Novel Write-Enhanced and Highly Reliable RHPD-12T SRAM Cells for Space Applications

Qiang Zhao, Chunyu Peng, Junning Chen, +2

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Non-volatile MemoryEngineeringComputer ArchitectureSpace ApplicationsHardware Security +14

In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands

Zhiting Lin, Honglan Zhan, Xuan Li, +4

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Non-volatile MemoryEngineeringComputer ArchitectureSram Array SchemeThree Read Ports +17

Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing

Zhiting Lin, Honglan Zhan, Zhongwei Chen, +6

IEEE Journal of Solid-State Circuits

Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureIntegrated Circuits +18

Challenges and Solutions of the TFET Circuit Design

Zhiting Lin, Panpan Chen, Le Ye, +7

IEEE Transactions on Circuits and Systems I Regular Papers

Device ModelingElectrical EngineeringSemiconductor DeviceOutput SaturationVlsi Design +11

Structural engineering of V2O5 nanobelts for flexible supercapacitors

Chunyu Peng, Mengmeng Jin, Dong Han, +2

Materials Letters

Materials ScienceSupercapacitorsEngineeringFlexible ElectronicsNanomaterials +4

Average 7T1R Nonvolatile SRAM With R/W Margin Enhanced for Low-Power Application

Chunyu Peng, Songsong Xiao, Wenjuan Lu, +4

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Low-power ElectronicsEnergy ConsumptionElectrical EngineeringNon-volatile MemoryEngineering +9

A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process

Zhiting Lin, Xiulong Wu, Zhi Li, +4

IEEE Journal of Solid-State Circuits

Semiconductor TechnologyThreshold Voltage VariationElectrical EngineeringEngineeringVlsi Design +12

Multiple Sharing 7T1R Nonvolatile SRAM With an Improved Read/Write Margin and Reliable Restore Yield

Zhiting Lin, Yong Wang, Chunyu Peng, +3

IEEE Transactions on Very Large Scale Integration (VLSI) Systems