Mulong Luo

Impacts of Random Telegraph Noise (RTN) on Digital Circuits

Mulong Luo, Runsheng Wang, Shaofeng Guo et al. · IEEE Transactions on Electron Devices · 2014 · 72 citations

Device Modeling, Ac Trap Effects, Electrical Engineering +15

SI for free: machine learning of interconnect coupling delay and transition effects

Andrew B. Kahng, Mulong Luo · 2015 · 70 citations

Engineering, Machine Learning, Vlsi Design +20

An assessment of vulnerability of hardware neural networks to dynamic voltage and temperature variations

Xun Jiao, Mulong Luo, Jeng-Hau Lin et al. · 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) · 2017 · 42 citations

Engineering, Machine Learning, Hardware Neural Networks +18

A unified approach for trap-aware device/circuit co-design in nanoscale CMOS technology

Runsheng Wang, Mulong Luo, Shaofeng Guo et al. · 2013 · 31 citations

Engineering, Vlsi Design, Realistic Manners +16

An assessment of vulnerability of hardware neural networks to dynamic voltage and temperature variations

Xun Jiao, Mulong Luo, Jeng-Hau Lin et al. · International Conference on Computer Aided Design · 2017 · 24 citations

Engineering, Machine Learning, Hardware Neural Networks +18