Himanshu Kaul

Near-threshold voltage (NTV) design

Himanshu Kaul, Mark Anders, Steven Hsu et al. · 2012 · 240 citations

Low-power Electronics, Energy Consumption, Electrical Engineering +11

16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS

Sanu Mathew, Sudhir Satpathy, Mark Anders et al. · 2014 · 237 citations

Hardware Security, Low-power Electronics, Electrical Engineering +14

2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors

Sanu Mathew, Suresh Srinivasan, Mark Anders et al. · IEEE Journal of Solid-State Circuits · 2012 · 188 citations

Low-power Electronics, Electrical Engineering, Engineering +10

340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS

Sanu Mathew, Sudhir Satpathy, Vikram Suresh et al. · IEEE Journal of Solid-State Circuits · 2015 · 137 citations

Engineering, Vlsi Design, Computer Architecture +19

53 Gbps Native ${\rm GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors

Sanu Mathew, Farhana Sheikh, Michael E. Kounavis et al. · IEEE Journal of Solid-State Circuits · 2011 · 137 citations

Engineering, Vlsi Design, Nm Cmos +18