Young-Il Lim

22.2 An 8.5Gb/s/pin 12Gb-LPDDR5 SDRAM with a Hybrid-Bank Architecture using Skew-Tolerant, Low-Power and Speed-Boosting Techniques in a 2nd generation 10nm DRAM Process

Hyung‐Joon Chi, Chang‐Kyo Lee, Jung Hwan Park et al. · 2020 · 26 citations

Non-volatile Memory, Engineering, Energy Efficiency +21

Bulk planar 20nm high-k/metal gate CMOS technology platform for low power and high performance applications

Hye Jip Cho, Kwangyou Seo, Won-Cheol Jeong et al. · 2011 · 24 citations

Engineering, Vlsi Design, Integrated Circuits +19

Implementation of HIGHT cryptic circuit for RFID tag

Young-Il Lim, Je-Hoon Lee, Younggap You et al. · IEICE Electronics Express · 2009 · 21 citations · Full text

Low-power Electronics, Hardware Security, Electrical Engineering +14

An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques

Chang‐Kyo Lee, Hyung‐Joon Chi, Jin‐Seok Heo et al. · IEEE Journal of Solid-State Circuits · 2020 · 16 citations