Sungphil Choi

A 10.4-Gb/s 1-Tap Decision Feedback Equalizer With Different Pull-Up and Pull-Down Tap Weights for Asymmetric Memory Interfaces

Joo‐Hyung Chae, Minchang Kim, Sungphil Choi et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2019 · 17 citations

Weight Selection Multiplexer, Pull-down Tap Weights, Engineering +13

A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller

Mino Kim, Joo‐Hyung Chae, Sungphil Choi et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2018 · 13 citations

Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT

Yong-Un Jeong, Sungphil Choi, Suhwan Kim et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2023 · 11 citations

A Low-Power and Low-Noise 20:1 Serializer with Two Calibration Loops in 55-nm CMOS

Yong-Un Jeong, Joo‐Hyung Chae, Sungphil Choi et al. · 2019 · 10 citations

A Differentiating Receiver With a Transition-Detecting DFE for Dual-Rank Mobile Memory Interface

Sungphil Choi, Yong-Un Jeong, Joo‐Hyung Chae et al. · IEEE Access · 2021 · 10 citations · Full text