A 10.4-Gb/s 1-Tap Decision Feedback Equalizer With Different Pull-Up and Pull-Down Tap Weights for Asymmetric Memory Interfaces

Abstract

In asymmetric memory systems, the pull-up and pull-down data from the channel can have different amounts of inter-symbol interference (ISI), so they cannot be fully corrected by an equalizer which uses a single tap weight. We introduce a receiver-side single-ended 1-tap asymmetric decision-feedback equalizer (DFE) with a weight selection multiplexer, which allows the application of a different weight to each direction of data value transition. Implemented in a 55-nm CMOS technology, our DFE compensated for asymmetric ISI in a 10.4-Gb/s signal from a channel with an insertion loss of -8.3 dB, leading to a 50% wider horizontal margin at a bit-error-rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> than symmetric correction. The energy efficiency is 0.16 pJ/bit.