E. DeLano

Performance features of the PA7100 microprocessor

T. Asprey, G.S. Averill, E. DeLano et al. · IEEE Micro · 1993 · 81 citations

Engineering, Computer Architecture, System-level Design +17

PA7200: a PA-RISC processor with integrated high performance MP bus interface

G. Kurpanek, Jia Zheng, E. DeLano et al. · 2002 · 61 citations

Engineering, Memory Design, Computer Architecture +18

A high speed superscalar PA-RISC processor

E. DeLano, W. Walker, J. Yetter et al. · 2003 · 28 citations

Processor Cache, Engineering, Vlsi Design +14

CMOS PA-RISC processor for a new family of workstations

M. Forsyth, S. Mangelsdorf, E. DeLano et al. · 2002 · 22 citations

Engineering, Vlsi Design, Cmos Pa-risc Processor +18

Data Cache design considerations for the Itanium/sub /spl reg// 2 Processor

T. Lyon, E. DeLano, C. McNairy et al. · 2003 · 21 citations

Hardware Security, Engineering, Itanium Processor Family +15