Jyh-Chyurn Guo

A new approach to determine the effective channel length and the drain-and-source series resistance of miniaturized MOSFET's

Jyh-Chyurn Guo, Sun‐Lin Chung, Chin-Wei Hsu · IEEE Transactions on Electron Devices · 1994 · 58 citations

Device Modeling, Effective Channel Length, Electrical Engineering +10

A broadband and scalable model for on-chip inductors incorporating substrate and conductor loss effects

Jyh-Chyurn Guo, Teng-Yang Tan · IEEE Transactions on Electron Devices · 2006 · 45 citations

Conductor Loss Effects, Engineering, Scalable Model +19

Pocket Implantation Effect on Drain Current Flicker Noise in Analog nMOSFET Devices

Jincheng Wu, Chao Cheng, Kai Ling Chiu et al. · IEEE Transactions on Electron Devices · 2004 · 35 citations

Low-power Electronics, Electrical Engineering, Pocket Implantation Effect +12

Narrow-Width Effect on High-Frequency Performance and RF Noise of Sub-40-nm Multifinger nMOSFETs and pMOSFETs

Kuo-Liang Yeh, Jyh-Chyurn Guo · IEEE Transactions on Electron Devices · 2012 · 29 citations

Electrical Engineering, Engineering, Rf Noise Parameters +14

A 90 nm CMOS MS/RF based foundry SOC technology comprising superb 185 GHz f/sub T/ RFMOS and versatile, high-Q passive components for cost/performance optimization

C.H. Chen, Chia-He Chang, C.P. Chao et al. · 2004 · 29 citations

Foundry Soc Technology, Passive Elements, Foundry 90 +16