Ping Lu - Concepedia

Author

Ping Lu

Lund University ORCID

Also Known As

, Lu Ping, Lu, Ping, Pengdong Lu, Ping Lu, To, A.

Publications

396

Citations

H-Index

Concepts

All Affiliations

Lund University Delft University of Technology Microsoft (United States)University College Dublin University of Toronto

About

Ping Lu is an author at Lund University specializing in computer engineering, microelectronics, and instrumentation.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Computer Engineering	4	4	90
2	Microelectronics	3	3	164
3	Engineering	2	2	58
4	Education	1	1	43
5	Measurement	1	1	43

Ping Lu

Publications

318

Citations

H-Index

Page 1

	Year	Citations
A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps Ping Lu, Antonio Liscidini, Pietro Andreani IEEE Journal of Solid-State Circuits Data ConverterMixed-signal Integrated CircuitEquivalent ResolutionDigital Circuit DesignMicroelectronics	2012	105
A 3.5–6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH $\Delta \Sigma $ -TDC for Low In-Band Phase Noise Ying Wu, Mina Shahmohammadi, Yue Chen, IEEE Journal of Solid-State Circuits Loop BandwidthData ConverterClock RecoveryAnalog DesignMixed-signal Integrated Circuit	2017	78
A 2.2-ps Two-Dimensional Gated-Vernier Time-to-Digital Converter With Digital Calibration Ping Lu, Ying Wu, Pietro Andreani IEEE Transactions on Circuits & Systems II Express Briefs EngineeringMeasurementCalibrationVernier Time-to-digital ConverterData Converter	2016	43
A 2-D GRO Vernier time-to-digital converter with large input range and small latency Ping Lu, Antonio Liscidini, Pietro Andreani Analog Integrated Circuits and Signal Processing Time-of-flight CameraLarge Input RangeSmall LatencyInstrumentationTime-of-flight Imaging	2013	16
A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter Ping Lu, Ying Wu, Pietro Andreani Improved Vernier TdcHigh-frequency DeviceMixed-signal Integrated CircuitAnalog DesignCmos Digital Pll	2012	16
A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs Ping Lu, Pietro Andreani, Antonio Liscidini Mixed-signal Integrated CircuitGro OperationDigital Circuit DesignMicroelectronicsRing Oscillators	2011	16
A 2-D GRO vernier time-to-digital converter with large input range and small latency Ping Lu, Pietro Andreani, Antonio Liscidini Time-of-flight CameraClock RecoveryData ConverterLarge Input RangeMixed-signal Integrated Circuit	2013	16
A Time-Domain 147fs<sub>rms 2.5</sub>-MHz Bandwidth Two-Step Flash-MASH 1-1-1 Time-to-Digital Converter With Third-Order Noise-Shaping and Mismatch Correction Ying Wu, Ping Lu, Robert Bogdan Staszewski IEEE Transactions on Circuits and Systems I Regular Papers EngineeringClock RecoveryData ConverterTdc LinearityAnalog Design	2020	15
A 10-bit 563-fs Step Constant-Slope Digital-to-Time Converter in 40-nm CMOS With Nonlinearity Cancellation and Range Extension Techniques Yan Liu, Haoyuan Gao, Hao Xu, IEEE Transactions on Circuits and Systems I Regular Papers	2023	13

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