Antonio Mastrandrea

Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops

Usman Khalid, Antonio Mastrandrea, Mauro Olivieri · Microelectronics Reliability · 2015 · 34 citations · Full text

Process Variations, Finfet Flip-flops, Electrical Engineering +9

A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs

Zia Abbas, Antonio Mastrandrea, Mauro Olivieri · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 31 citations

Engineering, Vlsi Design, Computer Architecture +16

Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment

Marcello Barbirotta, Antonio Mastrandrea, Francesco Menichelli et al. · 2020 · 24 citations

Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core

Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea et al. · Journal of Low Power Electronics and Applications · 2022 · 24 citations · Full text

Single Event Upset, Engineering, Interleaved-multi-threading Risc-v Core +16

Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors

Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea et al. · IEEE Access · 2022 · 22 citations · Full text

Digital Chips, Engineering, Computer Architecture +17