Yoichi Koyanagi

A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS

Samir Parikh, Tsung Sheng Kao, Y. Hidaka et al. · 2013 · 87 citations

Engineering, Computer Engineering, Electrical Engineering +16

3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS

Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata et al. · 2016 · 77 citations

Engineering, Communication, Electrical Engineering +17

A 4-Channel 1.25–10.3 Gb/s Backplane Transceiver Macro With 35 dB Equalizer and Sign-Based Zero-Forcing Adaptive Control

Yasuo Hidaka, Weixin Gai, Takeshi Horie et al. · IEEE Journal of Solid-State Circuits · 2009 · 72 citations

Engineering, Computer Engineering, Electrical Engineering +15

22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOI

Yanfei Chen, Masaya Kibune, Asako Toda et al. · 2015 · 69 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS

Takayuki Shibasaki, Win Chaivipas, Yanfei Chen et al. · 2014 · 33 citations

Engineering, Computer Engineering, Electrical Engineering +15