Kazutaka Ikegami

7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using physically eliminated read-disturb scheme and normally-off memory architecture

Hiroki Noguchi, Kazutaka Ikegami, K. Kushida et al. · 2015 · 96 citations

Non-volatile Memory, Engineering, Memory Design +20

Impact of ultra low power and fast write operation of advanced perpendicular MTJ on power reduction for high-performance mobile CPU

E. Kitagawa, Shinobu Fujita, Kumiko Nomura et al. · 2012 · 88 citations

Non-volatile Memory, Engineering, Vlsi Design +18

Voltage-control spintronics memory (VoCSM) having potentials of ultra-low energy-consumption and high-density

H. Yoda, N. Shimomura, Y. Ohsawa et al. · 2016 · 71 citations

Non-volatile Memory, Engineering, Emerging Memory Technology +20

7.2 4Mb STT-MRAM-based cache with memory-access-aware power optimization and write-verify-write / read-modify-write scheme

Hiroki Noguchi, Kazutaka Ikegami, Satoshi Takaya et al. · 2016 · 68 citations

Non-volatile Memory, Electrical Engineering, Engineering +12

Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU

Hiroki Noguchi, Kazutaka Ikegami, Naoharu Shimomura et al. · 2014 · 61 citations

Hardware Security, Last Level Cache, Electrical Engineering +11