Kamalaksha Baral

Device and Circuit-Level Assessment of GaSb/Si Heterojunction Vertical Tunnel-FET for Low-Power Applications

Ashish Kumar Singh, A Samad, Sweta Chander et al. · IEEE Transactions on Electron Devices · 2020 · 183 citations

Engineering, Electrical Engineering, Materials Science +17

2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO₂/HfO₂ Stacked Gate-Oxide Structure

Sanjay Kumar, Ekta Goel, Kunal Singh et al. · IEEE Transactions on Electron Devices · 2017 · 182 citations

Engineering, Electrical Engineering, Materials Science +17

2-D Analytical Drain Current Model of Double-Gate Heterojunction TFETs With a SiO₂/HfO₂ Stacked Gate-Oxide Structure

Sanjay Kumar, Kunal Singh, Sweta Chander et al. · IEEE Transactions on Electron Devices · 2017 · 78 citations

Engineering, Electrical Engineering, Materials Science +17

III-V/Si staggered heterojunction based source-pocket engineered vertical TFETs for low power applications

Manas Ranjan Tripathy, Ashish Kumar Singh, Kamalaksha Baral et al. · Superlattices and Microstructures · 2020 · 69 citations

Engineering, Electrical Engineering, Materials Science +12

Temperature analysis of Ge/Si heterojunction SOI-Tunnel FET

Sweta Chander, Sanjeet Kumar Sinha, Sanjay Kumar et al. · Superlattices and Microstructures · 2017 · 64 citations

Engineering, Electrical Engineering, Materials Science +14