Tetsushi Tanizaki

A Scalable Massively Parallel Processor for Real-Time Image Processing

Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima et al. · IEEE Journal of Solid-State Circuits · 2011 · 31 citations

Engineering, Multimedia Processor, Computer Architecture +21

The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture

Hideyuki Noda, Masami Nakajima, K. Dosaka et al. · IEEE Journal of Solid-State Circuits · 2007 · 23 citations

Cluster Computing, Engineering, Vlsi Design +16

Test cost reduction by at-speed BISR for embedded DRAMs

Yoshihiro Nagura, M. Mullins, A. Sauvageau et al. · 2002 · 15 citations

Hardware Security, Electrical Engineering, Engineering +14

A high density memory for SoC with a 143MHz SRAM interface using sense-synchronized-read/write

Yasuhiko Taito, Tetsushi Tanizaki, M. Kinoshita et al. · 2003 · 12 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +10

An embedded DRAM hybrid macro with auto signal management and enhanced-on-chip tester

Naoya Watanabe, Fukashi Morishita, Yasuhiko Taito et al. · 2002 · 11 citations

Engineering, Mem Testing, Computer Architecture +18