D. Arar

Design and simulation of a nanoelectronic DG MOSFET current source using artificial neural networks

F. Djeffal, Zohir Dibi, Mohamed Lamine Hafiane et al. · Materials Science and Engineering C · 2006 · 46 citations

Device Modeling, Electrical Engineering, Semiconductor Device +8

A two-dimensional analytical subthreshold behavior analysis including hot-carrier effect for nanoscale Gate Stack Gate All Around (GASGAA) MOSFETs

M.A. Abdi, F. Djeffal, Zohir Dibi et al. · Journal of Computational Electronics · 2010 · 41 citations

Device Modeling, Electrical Engineering, Hot-carrier Effect +6

Numerical investigation of a double-junction a:SiGe thin-film solar cell including the multi-trench region

K. Kacha, F. Djeffal, H. Ferhati et al. · Journal of Semiconductors · 2015 · 39 citations

Multi-trench Region, Electrical Engineering, Engineering +10

Numerical analysis of Double Gate and Gate All Around MOSFETs with bulk trap states

M.A. Abdi, F. Djeffal, D. Arar et al. · Journal of Materials Science Materials in Electronics · 2007 · 29 citations

Numerical Analysis, Device Modeling, Electrical Engineering +8

Subthreshold behavior optimization of nanoscale Graded Channel Gate Stack Double Gate (GCGSDG) MOSFET using multi-objective genetic algorithms

T. Bendib, F. Djeffal, D. Arar · Journal of Computational Electronics · 2011 · 22 citations

Subthreshold Behavior Optimization, Electrical Engineering, Engineering +5