D.M.H. Walker

An efficient algorithm for finding the k longest testable paths through each gate in a combinational circuit

Wangqi Qiu, D.M.H. Walker · 2004 · 120 citations

Circuit Complexity, Engineering, Test Data Generation +18

K longest paths per gate (KLPG) test generation for scan-based sequential circuits

Wangqi Qiu, Jing Wang, D.M.H. Walker et al. · 2004 · 116 citations

Engineering, Mem Testing, Computer Architecture +20

Power Supply Noise in Delay Testing

Jing Wang, D.M.H. Walker, Ananta K. Majhi et al. · 2006 · 80 citations

Electrical Engineering, Noise Impact, Engineering +11

Resistive bridge fault modeling, simulation and test generation

Vijay Ramesh Sar-Dessai, D.M.H. Walker · 2003 · 77 citations

Engineering, Structural Engineering, Bridge Design +17

Longest-path selection for delay test under process variation

Xiang Lü, Zhuo Li, Wangqi Qiu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2005 · 50 citations

Engineering, Process Variation, Computer Architecture +20