Y. Hagiwara

A single chip digital signal processor and its application to real-time speech analysis

Y. Hagiwara, Y. Kita, T. Miyamoto et al. · IEEE Transactions on Acoustics Speech and Signal Processing · 1983 · 20 citations

Engineering, Vlsi Design, Computer Architecture +21

A 25-ns 4-Mbit CMOS SRAM with dynamic bit-line loads

F. Miyaji, Y. Matsuyama, Y. Kanaishi et al. · IEEE Journal of Solid-State Circuits · 1989 · 20 citations

Hardware Security, Low-power Electronics, Electrical Engineering +13

A 50ns DSP with parallel processing architecture

Kenji Kaneko, Takayuki Nakagawa, A. Kiuchi et al. · 1987 · 18 citations

Engineering, Parallel Processing Architecture, Computer Architecture +18

A 20-ns CMOS micro DSP core for video-signal processing

T. Baji, Hirotsugu Kojima, S. Ohba et al. · IEEE Journal of Solid-State Circuits · 1988 · 14 citations

Engineering, Instruction Cycle Time, Computer Architecture +18

A 25 ns 4 Mb CMOS SRAM with dynamic bit line loads

F. Miyaji, Y. Matsuyama, I. Naiki et al. · 2003 · 13 citations

Hierarchical Structure, Electrical Engineering, Memory Architecture +11