Sih-Han Li

16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

Jian-Wei Su, Yen-Chi Chou, Ruhui Liu et al. · 2021 · 184 citations

Engineering, Computer Architecture, Multi-channel Memory Architecture +18

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Jian-Wei Su, Xin Si, Yen-Chi Chou et al. · 2020 · 178 citations

Engineering, Edge Device, Computer Architecture +21

A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices

Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 125 citations

Engineering, Emerging Memory Technology, Computer Architecture +21

A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors

Yen-Cheng Chiu, Zhixiao Zhang, Jiajing Chen et al. · IEEE Journal of Solid-State Circuits · 2020 · 85 citations

Electrical Engineering, Memory Architecture, Engineering +13

A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices

Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong et al. · 2023 · 83 citations

Edge Devices, Engineering, Hardware Acceleration +14