Dae-Hwan Ahn

High performance PRAM cell scalable to sub-20nm technology with below 4F2 cell size, extendable to DRAM applications

I.S. Kim, S.L. Cho, D.H. Im et al. · 2010 · 186 citations

Engineering, Materials Engineering, Materials Science +15

Electronic-photonic integrated circuits on the CMOS platform

Lionel C. Kimerling, Dae-Hwan Ahn, Alyssa Apsel et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2006 · 152 citations

Engineering, Computer Engineering, Electrical Engineering +17

A unified 7.5nm dash-type confined cell for high performance PRAM device

D.H. Im, J.I. Lee, S.L. Cho et al. · 2008 · 96 citations

Natural Sciences, Materials Engineering, Materials Science +15

PRAM cell technology and characterization in 20nm node size

Minjin Kang, Taegun Park, Yong-Jin Kwon et al. · 2011 · 95 citations

Engineering, Electrical Engineering, Materials Science +11

Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation

J.I. Lee, Hae‐Sim Park, S.L. Cho et al. · 2007 · 76 citations

Natural Sciences, Materials Engineering, Materials Science +11