Seng Oon Toh - Concepedia

Author

Seng Oon Toh

University of California, Berkeley

Also Known As

S. O. Toh, S.-O. Toh, Seng Oon Toh, Seng Toh

Publications

323

Citations

H-Index

Concepts

All Affiliations

University of California, Berkeley Intel (United States)Laboratoire d'Électronique des Technologies de l'Information Renesas Electronics (Japan)Commissariat à l'Énergie Atomique et aux Énergies Alternatives

About

Seng Oon Toh is an author at University of California, Berkeley specializing in electrical engineering, engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	10	10	299
2	Electrical Engineering	10	10	299
3	Computer Engineering	9	9	278
4	Applied Physics	3	3	106
5	Social Sciences	1	1	19

Seng Oon Toh

Publications

299

Citations

H-Index

Page 1

	Year	Citations
Characterization of Dynamic SRAM Stability in 45 nm CMOS Seng Oon Toh, Zheng Guo, Tsu‐Jae King Liu, IEEE Journal of Solid-State Circuits ReliabilityDynamic MetricsElectrical EngineeringReliability EngineeringEngineering	2011	73
SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS Brian Zimmer, Seng Oon Toh, Huy T. Vo, IEEE Transactions on Circuits & Systems II Express Briefs Low-power ElectronicsHardware SecurityElectrical EngineeringSram Assist TechniquesWide Voltage Range	2012	72
A 12.4pJ/cycle sub-threshold, 16pJ/cycle near-threshold ARM Cortex-M0+ MCU with autonomous SRPG/DVFS and temperature tracking clocks James Myers, Anand Savanth, Pranay Prabhat, Active EnergyEngineeringVlsi DesignComputer ArchitectureIntegrated Circuits	2017	32
Dynamic SRAM stability characterization in 45nm CMOS Seng Oon Toh, Zheng Guo, Borivoje Nikolić Electrical EngineeringEngineeringVlsi DesignHardware ReliabilityBias Temperature Instability	2010	23
Analysis of the relationship between random telegraph signal and negative bias temperature instability Yasumasa Tsukamoto, Seng Oon Toh, Changhwan Shin, Device ModelingSemiconductor TechnologyElectrical EngineeringNegative BtiEngineering	2010	21
Technology Variability From a Design Perspective Borivoje Nikolić, Jihoon Park, Jaehwa Kwak, IEEE Transactions on Circuits and Systems I Regular Papers Design DecisionEngineeringVlsi DesignAdded MarginsSram Design Margins	2011	19
SRAM stability characterization using tunable ring oscillators in 45nm CMOS J.S.H. Tsai, Seng Oon Toh, Zheng Guo, Non-volatile MemoryElectrical EngineeringSram YieldEngineeringVlsi Design	2010	18
Impact of random telegraph signals on V<inf>min</inf> in 45nm SRAM Seng Oon Toh, Yasumasa Tsukamoto, Zheng Guo, Electrical EngineeringEngineeringSram TransistorMeasurementBias Temperature Instability	2009	16
Impact of random telegraph signaling noise on SRAM stability Seng Oon Toh, Tsu‐Jae King Liu, Borivoje Nikolić Symposium on VLSI Technology Electrical EngineeringEngineeringSram StabilityBias Temperature InstabilityComputer Engineering	2011	13
Dynamic single-p-well SRAM bitcell characterization with back-bias adjustment for optimized wide-voltage-range SRAM operation in 28nm UTBB FD-SOI Olivier Thomas, Brian Zimmer, Seng Oon Toh, Low-power ElectronicsElectrical EngineeringUltra-thin BodyVlsi DesignEngineering	2014	12

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