T. Terano

A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations

Makoto Yabuuchi, Koji Nii, Yasumasa Tsukamoto et al. · 2007 · 66 citations

Engineering, Computer Engineering, Computer Science +15

A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations

Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto et al. · IEEE Journal of Solid-State Circuits · 2008 · 64 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 45 nm 2-port 8T-SRAM Using Hierarchical Replica Bitline Technique With Immunity From Simultaneous R/W Access Issues

Satoshi Ishikura, M. Kurumada, T. Terano et al. · IEEE Journal of Solid-State Circuits · 2008 · 45 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 2.97μm-Pitch Event-Based Vision Sensor with Shared Pixel Front-End Circuitry and Low-Noise Intensity Readout Mode

Atsumi Niwa, Futa Mochizuki, Raphael Berner et al. · 2023 · 30 citations

Engineering, Computer Engineering, Electrical Engineering +17

A novel logic compatible gain cell with two transistors and one capacitor

N. Ikeda, T. Terano, Hidekazu Moriya et al. · 2002 · 14 citations

Engineering, Computer Engineering, Electrical Engineering +15