Malik Umar Sharif

Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs.

Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski et al. · IACR Cryptology ePrint Archive · 2012 · 63 citations

Hardware Security, Hardware Performance, Engineering +15

A performance comparison of machine learning models for stock market prediction with novel investment strategy

Azaz Hassan Khan, Abdullah Shah, Abbas M. Ali et al. · PLoS ONE · 2023 · 26 citations · Full text

Use of embedded FPGA resources in implementations of 14 round 2 SHA-3 candidates

Rabia Shahid, Malik Umar Sharif, Marcin Rogawski et al. · 2011 · 22 citations

Hardware Security, Round 2, Embedded Resources +15

A High-Speed Constant-Time Hardware Implementation of NTRUEncrypt SVES

Farnoud Farahmand, Malik Umar Sharif, Kevin Briggs et al. · 2018 · 18 citations

Cryptographic Primitive, Engineering, Computer Architecture +16

Hardware-software codesign of RSA for optimal performance vs. flexibility trade-off

Malik Umar Sharif, Rabia Shahid, Kris Gaj et al. · 2016 · 11 citations

Engineering, Hardware Algorithm, Computer Architecture +17