A.J. Yerman

Hot Spots Caused by Voids and Cracks in the Chip Mountdown Medium in Power Semiconductor Packaging

A.J. Yerman, James Burgess, R. O. Carlson et al. · IEEE Transactions on Components Hybrids and Manufacturing Technology · 1983 · 34 citations

Chip Mountdown Medium, Engineering, Defect Tolerance +22

Design issues for the transformer in a low-voltage power supply with high efficiency and high power density

Khai D. T. Ngo, R.P. Alley, A.J. Yerman et al. · IEEE Transactions on Power Electronics · 1992 · 25 citations

Electrical Engineering, Design Tradeoffs, Planar Windings +10

Fabrication method for a winding assembly with a large number of planar layers

Khai D. T. Ngo, R.P. Alley, A.J. Yerman · IEEE Transactions on Power Electronics · 1993 · 22 citations

Industrial Design, Electrical Engineering, Engineering +13

Voids, Cracks, and Hot Spots in Die Attach

R. O. Carlson, A.J. Yerman, James Burgess et al. · Reliability physics · 1983 · 21 citations

Engineering, Mechanical Engineering, Defect Tolerance +20

Evaluation of trade-offs in transformer design for very-low-voltage power supply with very high efficiency and power density

Khai D. T. Ngo, R.P. Alley, A.J. Yerman et al. · 1990 · 19 citations

Electrical Engineering, Power Density, Engineering +14