Aayushi Dangol

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

Hans Mertens, R. Ritzenthaler, Andriy Hikavyy et al. · 2016 · 198 citations

Engineering, Electrical Engineering, Materials Science +17

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

Hans Mertens, R. Ritzenthaler, Adrian Chasin et al. · 2016 · 161 citations

Engineering, Electrical Engineering, Materials Science +17

Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration

Hans Mertens, R. Ritzenthaler, V. Peña et al. · 2017 · 130 citations

Engineering, Electrical Engineering, Microelectronics +16

Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization

R. Ritzenthaler, Hans Mertens, V. Peña et al. · 2018 · 98 citations

Engineering, Electrical Engineering, Materials Science +17

Si-cap-free SiGe p-channel FinFETs and gate-all-around transistors in a replacement metal gate process: Interface trap density reduction and performance improvement by high-pressure deuterium anneal

Hans Mertens, R. Ritzenthaler, Hiroaki Arimura et al. · 2015 · 53 citations

Engineering, Electrical Engineering, Materials Science +15