Jung K. Wang

Bias Dependence of Single-Event Upsets in 16 nm FinFET D-Flip-Flops

Balaji Narasimham, Safar Hatami, Ali Anvar et al. · IEEE Transactions on Nuclear Science · 2015 · 47 citations · Full text

Engineering, Electrical Engineering, Physics +16

Single-Event Charge Collection and Upset in 40-nm Dual- and Triple-Well Bulk CMOS SRAMs

Indranil Chatterjee, Balaji Narasimham, N. N. Mahatme et al. · IEEE Transactions on Nuclear Science · 2011 · 44 citations

Engineering, Computer Engineering, Electrical Engineering +12

Influence of supply voltage on the multi-cell upset soft error sensitivity of dual- and triple-well 28 nm CMOS SRAMs

Balaji Narasimham, Jung K. Wang, Narayana Vedula et al. · 2015 · 18 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +15

Charge-Steering Latch Design in 16 nm FinFET Technology for Improved Soft Error Hardness

Balaji Narasimham, Karthik Chandrasekharan, Jung K. Wang et al. · IEEE Transactions on Nuclear Science · 2016 · 16 citations

Engineering, Computer Engineering, Electrical Engineering +16

Contribution of Control Logic Upsets and Multi-Node Charge Collection to Flip-Flop SEU Cross-Section in 40-nm CMOS

Balaji Narasimham, Jung K. Wang, Myron Buer et al. · IEEE Transactions on Nuclear Science · 2010 · 12 citations

Engineering, Computer Engineering, Electrical Engineering +13