Proceedings. 42nd Design Automation Conference, 2005.

Secure scan: a design-for-test architecture for crypto chips

Bo Yang, Kaijie Wu, Ramesh Karri · 2005 · 58 citations

Hardware Trojan, Engineering, Information Security +17

Correlation-aware statistical timing analysis with non-Gaussian delay distributions

Yaping Zhan, A.J. Strojwas, X. Li et al. · 2005 · 57 citations

Engineering, Vlsi Design, Computer Architecture +16

An efficient algorithm for statistical minimization of total power under timing yield constraints

M. Mani, A. Devgan, M. Orshansky · 2005 · 44 citations

Mathematical Programming, Engineering, Energy Efficiency +19

Circuit optimization using statistical static timing analysis

A. Agarwal, Kaviraj Chopra, David Blaauw et al. · 2005 · 43 citations

Engineering, Vlsi Design, Power Optimization (Eda) +16

Minimising buffer requirements of synchronous dataflow graphs with model checking

Marc Geilen, Twan Basten, Sander Stuijk · 2005 · 39 citations

Cluster Computing, Engineering, Dynamic Resource Allocation +24