First Demonstration of Sequential Integration for Stacked Gate-All-Around a-IGZO Nanosheet Transistors with Record I_d = 2.05 mA/µm, g_m = 1.13 mS/µm and Ultralow SS = 66 mV/dec

Abstract

In this work, high-performance stacked gate-all-around (GAA) a-IGZO 2-layer nanosheets field-effect transistors (NSFET) has been demonstrated for the first time, with the entire thermal budget below 300°C with back-end-of-line (BEOL) compatibility. The performance of the GAA IGZO nanosheet FETs can be successfully improved for over twice of the single channel. As high-k HfLaO dielectric scales from 10 nm to 4 nm, a short channel 50 nm-long transistor exhibits a record-high g <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> of 1.13 mS/µm at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</inf> =1.5 V and record-high on-state current of 2.05 mA/µm at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</inf> =1 V, the highest among all IGZO-based FETs. Meanwhile, the same short channel transistor achieves ultra-low SS of 66 mV/dec, realizing a record-high quality factor g <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> /SS larger than 10 for the first time among a-IGZO transistors. The GAA NSFETs also show I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf> <10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> µA/µm (measurement limit) and a high on/off ratio > 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> despite the 4 nm thin high-k dielectric.