DACA: Dynamic Accuracy-Configurable Adders for Energy-Efficient Multi-Precision Computing

Abstract

An accuracy-configurable adder (ACA) meets various requirements in energy efficiency and accuracy of many applications. However, it suffers from problems such as a large hardware cost for performing configurations. In this article, we propose two energy-efficient transistor-level accuracy-configurable full adders, referred to as a positive ACA (PACA) and a negative ACA (NACA). Each design uses only two transistors as switches driven by an enable signal to configure the accurate and approximate modes. Dynamic accuracy-configurable adders (DACAs) are further developed by cascading the PACAs or NACAs. The DACA design realizes a remarkable trade-off between accuracy and performance by switching between different degrees of approximations. Simulation results show that compared with an accurate adder, a 16-bit DACA provides a saving of up to 43.61% in power and a reduction of 83.31% in delay, with only a loss of 11.96% in accuracy. The advantage of the DACA is illustrated by applications of image processing and classification using a neural network model.