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Performance Improvement of Amorphous Thin-Film Transistors With Solution-Processed InZnO/InMgZnO Bilayer Channels
14
Citations
25
References
2023
Year
Materials ScienceSemiconductorsElectrical EngineeringElectronic DevicesEngineeringElectronic MaterialsIndium–magnesium–zinc OxideHigh MobilityOxide SemiconductorsApplied PhysicsOxide ElectronicsIndium–zinc OxideThin FilmsAmorphous Thin-film TransistorsPerformance ImprovementThin Film ProcessingBeyond CmosSemiconductor Device
We present a dual active layer structure composed of indium–zinc oxide (InZnO) and indium–magnesium–zinc oxide (InMgZnO), which is fabricated using a simple solution process. By utilizing a heterojunction structure, combined with the high mobility of the front channel (InZnO) and the low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{\scriptstyle OFF}}$ </tex-math></inline-formula> -state current of the back channel (InMgZnO), we are able to achieve thin-film transistor (TFT) devices with enhanced performance and greater stability. Finally, we are able to optimize the device by optimizing the front channel thickness and treating the heterojunction interface with oxygen plasma, achieving a mobility ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {sat}}$ </tex-math></inline-formula> ) of 5.94 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text {V}\cdot \text {s}$ </tex-math></inline-formula> ), a threshold voltage of 0.98 V, an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I} _{ { {\text {ON}}}}/{I} _{ { {\text {OFF}}}}$ </tex-math></inline-formula> ratio of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.49\times 10^{{8}}$ </tex-math></inline-formula> , and a subthreshold swing (SS) of 325 mV/decade. Furthermore, the device maintains almost unchanged hysteresis voltage and exhibits high bias stability, which is demonstrated by the minimal threshold voltage variation of only 0.27 and −0.21 V under positive gate bias (PBS) and negative gate bias (NBS) for 1 h, respectively. The high electrical performance and stability of heterojunction TFTs can be attributed to the reduced interfacial defect state achieved through oxygen plasma treatment, as well as the electron redistribution occurring at the heterojunction interface.
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