IEEE Transactions on Smart Grid · 2023 · 13 citations · 19 references
EngineeringComputer EngineeringComputer ScienceArtificial IntelligenceComputer ArchitectureField-programmable Gate ArraysAccelerator ArchitectureFault DetectionField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationSmart GridsEnergy-efficient Hardware AccelerationFault Detection ModelsField-programmable Gate Array AcceleratorsField-programmable Gate Arrays (Fpgas)Heterogeneous Computing ArchitectureHigh-performance Computing PerformanceMachine Learning For Smart GridsReconfigurable Hardware Architecture
Inferring faults throughout the power grid involves fast calculation, large scale of data, and low latency. Our heterogeneous architecture in the edge offers such high computing performance and throughput using an Artificial Intelligence (AI) core deployed in the Alveo accelerator. In addition, we have described the process of porting standard AI models to Vitis AI and discussed its limitations and possible implications. During validation, we designed and trained some AI models for fast fault detection in Smart Grids. However, the AI framework is standard, and adapting the models to Field Programmable Gate Arrays (FPGA) has demanded a series of transformation processes. Compared with the Graphics Processing Unit platform, our implementation on the FPGA accelerator consumes less energy and achieves lower latency. Finally, our system balances inference accuracy, on-chip resources consumed, computing performance, and throughput. Even with grid data sampling rates as high as 800,000 per second, our hardware architecture can simultaneously process up to 7 data streams.
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Alessandro Aimar, Hesham Mostafa, Enrico Calabrese et al. · IEEE Transactions on Neural Networks and Learning Systems · 2018 · 289 citations