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All-Sputter-Deposited Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub> Double-Gate Ferroelectric Thin-Film Transistor With Amorphous Indium–Gallium–Zinc Oxide Channel

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References

2023

Year

Abstract

Double-gate ferroelectric thin-film transistor (DG-FeTFT) with an amorphous indium–gallium–zinc oxide ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\alpha $ </tex-math></inline-formula> -IGZO) channel is demonstrated. DG-FeTFT is composed of all-sputter-deposited thin films and the bottom FeTFT (FeTFT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {bottom}}{)}$ </tex-math></inline-formula> and top conventional TFT (TFT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {top}}{)}$ </tex-math></inline-formula> are combined into a single device that shares the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\alpha $ </tex-math></inline-formula> -IGZO channel and source/drain. Through the separation of read (by TFT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {top}}{)}$ </tex-math></inline-formula> and program/erase (by FeTFT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {bottom}}{)}$ </tex-math></inline-formula> operations, it is confirmed that wide memory window (MW) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim $ </tex-math></inline-formula> 5V is obtained with an MW amplification and read disturbance can be significantly improved. Furthermore, it is verified that faster program/erase speeds are achievable by modulating the gate voltage of TFTtop, leading to the improved endurance characteristics.

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