Interfacial Layer Engineering to Enhance Noise Immunity of FeFETs for IMC Applications

Abstract

This article reports an improvement in the low- frequency noise characteristics in hafnium oxide-based (HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> ) ferroelectric field-effect transistors (FeFET) by interfacial layer (IL) engineering. FeFET devices with silicon dioxide (SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> ) and silicon oxynitride (SiON) as IL were fabricated and characterised. FeFETs with SiON interfaces demonstrated an excellent improvement in variation, and low-frequency noise characteristics. The wider memory window for operation in FeFETs with SiON IL also allows for a higher noise tolerance during the inference operation. Finally, the evaluation of system performance by neuromorphic simulation shows that FeFET with SiON IL are highly immune to noise degradation and endurance, without retention penalty.