Concepedia

IMPACT

Pohua P. Chang, Scott Mahlke, William Y. Chen, Nancy J. Warter, Wen‐mei Hwu

ACM SIGARCH Computer Architecture News · 1991 · 54 citations · 23 references

Open access

Concepts

ComputingComputer ScienceHigh-performance ComputingComputer ArchitectureFault ToleranceFault-tolerant ComputingInstruction Set ArchitectureParallel ArchitecturesHigh-performance Computing SystemsMicroarchitecture PerformanceMicroarchitecture Performance EvaluationMultiple-issue Architectures

Abstract

The performance of multiple-instruction-issue processors ing and new architectures receive immediate compilation support from the IMPACT-I C compiler. 1

References

23

Trace Scheduling: A Technique for Global Microcode Compaction

Fisher · IEEE Transactions on Computers · 1981 · 1.3K citations

Computing, Computer Engineering, Computer Science +13

Register allocation & spilling via graph coloring

Gregory J. Chaitin · ACM SIGPLAN Notices · 1982 · 767 citations · Full text

Computing, Computer Engineering, Computer Science +17

Software pipelining: an effective scheduling technique for VLIW machines

Monica S. Lam · 1988 · 634 citations

Computing, Computer Engineering, Computer Science +10

The Cydra 5 departmental supercomputer: design philosophies, decisions, and trade-offs

B. Ramakrishna Rau, David W. L. Yen, Wei Yen et al. · Computer · 1989 · 355 citations

Computing, Computer Science, Computer Systems +16

Achieving high instruction cache performance with an optimizing compiler

Wen‐mei Hwu, Pohua P. Chang · 1989 · 230 citations

Engineering, Computer Engineering, Computer Science +17