Microarchitecture Performance Evaluation

Microarchitecture Performance Evaluation is a systematic methodology used in computer architecture research to quantitatively assess the efficiency, speed, power consumption, and resource utilization of a processor's microarchitectural design relative to its instruction set architecture and workload behavior.

577

Publications

47.1K

Citations

1.4K

Authors

299

Institutions

Publications per year

2017–2026

48

Variants

Microarchitectural Performance Evaluation

Authors

1.4K

  1. LE
    Lieven Eeckhout

    Ghent University, Belgium

    20 publications · 1.4K citations

    18

    h-index

  2. LK
    Lizy K. John

    The University of Texas at Austin, United States

    20 publications · 1.4K citations

    18

    h-index

  3. DB
    Doug Burger

    The University of Texas at Austin, United States

    10 publications · 1.7K citations

    10

    h-index

  4. DB
    David Brooks

    Harvard University Press, United States

    10 publications · 769 citations

    10

    h-index

  5. KD
    Koen De Bosschere

    Ghent University, Belgium

    8 publications · 581 citations

    8

    h-index

1–5 of 1.4K

Venues

  1. ACM SIGARCH Computer Architecture News

    27 publications · 3.3K citations

    22

    h-index

  2. IEEE Micro

    23 publications · 2.3K citations

    18

    h-index

  3. Computer

    17 publications · 1.7K citations

    15

    h-index

  4. IEEE Transactions on Computers

    11 publications · 464 citations

    11

    h-index

  5. IEEE Computer Architecture Letters

    8 publications · 569 citations

    8

    h-index

1–5