Multiple-issue Architectures

Multiple-Issue Architectures is a processor design paradigm in computer architecture that enables the simultaneous dispatch and execution of multiple instructions per clock cycle, distinguishing it from single-issue architectures by exploiting instruction-level parallelism through hardware-based dynamic scheduling and resource duplication.

57

Publications

5.9K

Citations

215

Authors

55

Institutions

Publications per year

2017–2026

1

Variants

Multiple-issue Processor Architectures

Authors

215

  1. SJ
    Susan J. Eggers

    University of Washington, United States

    7 publications · 3.2K citations

    7

    h-index

  2. DM
    Dean M. Tullsen

    University of California San Diego, United States

    7 publications · 3.2K citations

    7

    h-index

  3. HM
    Henry M. Levy

    University of Washington, United States

    7 publications · 3.2K citations

    7

    h-index

  4. RH
    R. Horst

    Tandem Diabetes Care (United States), United States

    3 publications · 79 citations

    3

    h-index

  5. JL
    Jack Lo

    University of Washington, United States

    3 publications · 1.1K citations

    3

    h-index

1–5 of 215

Venues

  1. ACM SIGARCH Computer Architecture News

    6 publications · 446 citations

    6

    h-index

  2. Minds at UW (University of Wisconsin)

    Repository · 1 publications · 148 citations

    1

    h-index

  3. Digital technical journal

    1 publications · 69 citations

    1

    h-index

  4. Microprocessors and Microsystems

    MICPRO · 1 publications · 36 citations

    1

    h-index

  5. International Journal of High Speed Computing

    1 publications · 12 citations

    1

    h-index

1–5