Increasing PCM main memory lifetime

TLDR

Phase‑Change Memory promises large energy savings but suffers from limited write endurance of about 10⁷ writes per cell. This paper proposes techniques to extend the lifetime of PCM when used as main memory. The authors introduce strategies including write‑back minimization via new cache replacement policies, selective writes that target only changed cells, a PCM‑aware swap algorithm for wear‑leveling, and a failure‑detection routine. These methods extend PCM lifetime from a few days to over eight years.

Abstract

The introduction of Phase-Change Memory (PCM) as a main memory technology has great potential to achieve a large energy reduction. PCM has desirable energy and scalability properties, but its use for main memory also poses challenges such as limited write endurance with at most 107 writes per bit cell before failure. This paper describes techniques to enhance the lifetime of PCM when used for main memory. Our techniques are (a) writeback minimization with new cache replacement policies, (b) avoidance of unnecessary writes, which write only the bit cells that are actually changed, and (c) endurance management with a novel PCM-aware swap algorithm for wear-leveling. A failure detection algorithm is also incorporated to improve the reliability of PCM. With these approaches, the lifetime of a PCM main memory is increased from just a few days to over 8 years.